1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a method for forming a semiconductor device isolation layer.
2. Discussion of the Related Art
When manufacturing a semiconductor device, a semiconductor device isolation layer is formed to isolate one cell from another on the substrate. The methods for forming a device isolation layer in a bipolar device include a junction isolation method, an oxide film isolation method, a trench isolation method, and an isolation method in which an epitaxial layer is grown selectively.
With reference to the accompanying drawings, conventional methods for forming a device isolation layer will be explained.
FIGS. 1a through 1d are cross-sectional views each showing a structure of a conventional isolation layer of a semiconductor device. FIGS. 2a through 2f are sectional views showing the process steps of a conventional method for fabricating an isolation layer of a semiconductor device.
FIG. 1a shows a section of a bipolar transistor having a trench type isolation layer. As shown in FIG. 1a, the semiconductor device includes a buried layer 2 formed selectively in a portion of the surface of a semiconductor substrate 1, a channel stop layer 3 formed selectively in another portion of the surface of the semiconductor substrate 1 where the buried layer 2 is not formed, an epitaxial layer 4 formed over the semiconductor substrate 1 exclusive of the channel stop layer 3, CVD (chemical vapor deposition) film 5 formed selectively on the channel stop layer 3 where the epitaxial layer is not formed, a field oxide film 7 formed on the CVD film 5 wider than the CVD film 5, base electrode layers 6 formed in the epitaxial layer 4 where the field oxide film 7 is not formed, an emitter electrode layer 8 formed in each base electrode layer 6, an insulating layer 9 formed over the entire surface of the substrate 1, inclusive of the base electrode layer 6 and the emitter electrode layers 8 and exclusive of the field oxide film 7, contact holes 20 formed in the insulating layer 9, and metal layers 10 in contact with the base electrode layers 6 and the emitter electrode layers 8 through the contact holes 20.
FIG. 1b shows a bipolar transistor having an ROI (recessed oxide isolation) type device isolation layer. As shown in FIG. 1b, the semiconductor device includes a buried layer 2 formed selectively in a portion of the surface of the semiconductor substrate 1, a channel stop layer 3 formed selectively in another portion of the surface of the semiconductor substrate 1 in which the buried layer 2 is not formed, an epitaxial layer 4 formed over the semiconductor layer 1 exclusive of the channel stop layer 3, a field oxide film 7 formed on the channel stop layer 3 wider than the channel stop layer 3, base electrode layers 6 isolated by the field oxide film 7 and formed in the epitaxial layer 4, emitter electrode layers 8 each formed in one of the base electrode layers 6, an insulating layer 9 formed over the entire semiconductor substrate 1 inclusive of the base electrode layers 6 and the emitter electrode layers 8 and exclusive of the field oxide film 7, contact holes 20 to the base electrode layers 6 and the emitter electrode layers 8 formed in the insulating layer 9, and metal layers 10 in contact with the base electrode layers 6 and the emitter electrode layers 8 through the contact holes 20. In the process of forming an ROI type device isolation layer, half of the thickness of the epitaxial layer 4 is etched and the field oxide film 7 is formed using the well-known LOCOS (Local Oxidation of Silicon) process. Preferably, the field oxide film 7 should be thicker than the epitaxial layer 4 to obtain isolation.
FIG. 1c shows a device isolation layer developed from the ROI type device isolation layer wherein the field oxide film is planarized by etch back.
FIG. 1d shows a device isolation layer of a SWAMI (side wall masked isolation) type formed like the device isolation layer shown in FIG. 1c, and wherein the field oxide film is planarized by etch back.
A conventional method for forming a device isolation layer having a structure as discussed above will be explained with reference to FIGS. 2a through 2f. Specifically, FIGS. 2a through 2f illustrate a conventional method for forming a device isolation layer of a trench type shown in FIG. 1a.
Referring to FIG. 2a, a buried layer 2 is formed selectively in a surface of a semiconductor substrate 1. Then, a channel stop layer 3 is formed selectively with an ion implantation process in another portion of the surface of the semiconductor substrate 1 where the buried layer 2 is not formed, and an epitaxial layer 4 having a specific thickness is formed over the entire surface of the semiconductor substrate 1. A buffer oxide layer 11 and a nitride film 12 are formed successively on the epitaxial layer 4.
Referring to FIG. 2b, the nitride film 12, the buffer oxide layer 11, and the epitaxial layer 4 over the channel stop layer 3 are etched selectively to form a trench 13.
Referring to FIG. 2c, the nitride film 12 and the buffer oxide layer 11 are removed selectively, and a thin oxide film 14 is formed over the entire surface of the substrate 1 including the trench region 13 in order to reduce the leakage current on the etched surface. A CVD film 5 is formed on the entire surface of the thin oxide film 14, and etched back to leave the CVD film 5 only in the trench region 13.
Referring to FIG. 2d, a buffer oxide film 12a and a nitride film 13a are formed successively on the entire surface of the substrate 1, and a portion of the nitride film 13a is removed selectively.
Referring to FIG. 2e, with the patterned nitride film 13a used as a mask, a field oxide film 7 is formed using a field oxidation process.
Referring to FIG. 2f, after removing the nitride film 13a and the buffer oxide film 12a, base electrode layers 6 and emitter electrode layers 8 are formed in the epitaxial layer 4 where the field oxide film 7 is not formed. An insulating layer 9 is formed over the entire surface of the substrate 1 inclusive of the field oxide film 7. The insulating film 9 is then removed selectively to form contact holes 20 through which a metal line (not shown) will be in contact with the base electrode layers 6 and the emitter electrode layers 8. The field oxide film 7 is formed to a thickness of 1000 .ANG., i.e., to an extent that the field oxide film 7 can block ions when ions are implanted for forming the base and emitter electrode layers 6 and 8.
The decrease in break-down voltage between terminals in the conventional device having the device isolation layer as described above results from reduced pattern dimensions and high density device packing which affect the product yield and performance of the device. Particularly, the excessive diffusion of the buried layer due to the heat treatment process in the fabrication process greatly affects the break-down voltage of the device. Specially, excessive diffusion, caused by heat treatment of the buried layer, has a great influence on the characteristic of the breakdown voltage. A minute leakage current flowing through junctions or a surface of the substrate is an important factor that affects the device performance.
In order to solve the problems of the breakdown voltage decrease and leakage current between cells, which decreases the performance of a device, device isolation layers with good isolation characteristics are required. Besides, the process for forming device isolation layers has to be simple to the extent that it should not affect the performance of the device.
However, conventional isolation layers for a semiconductor device have the following problems:
First, in the case of the trench type device isolation layer shown in FIGS. 2a-2f, the etch back of the CVD film and the repetitive processes of forming the buffer oxide layer and the nitride layer to form the field oxide film complicates the overall process.
The planarized device isolation layers shown in FIGS. 1b-1d have problems in that the lengthy heat treatment for forming the field oxide film thicker than the thickness of the epitaxial layer to improve isolation causes excessive diffusion of the buried layer and bird's beak to occur. This results in an increase in leakage current that degrades device performance.
A HIPOX(high-pressure oxidation) type device isolation layer proposed to solve the aforementioned problems has high costs with respect to the formation of the isolation layer due to the additional equipment required.